The AEMB is designed with an FPGA target technology implementation. Since this is the case, it may be prudent to exploit certain FPGA capabilities that are not present on ASIC technologies. One such capability is the ability of an FPGA to pre-load the contents of block memories from an FPGA image. This ability is often used to create a read-only RAM block or ROM block.
However, if the write-enable signal is enabled this ability can be used to pre-load the contents of any RAM block such as the one used to hold the instruction cache of the AEMB. It would be interesting to inject a set of start-up instructions into the instruction cache during power-on. While the instruction cache is necessarily small, it should be large enough to hold some sort of initial execution environment.
There are many possible applications for the initial execution environment. One such possibility is to emulate certain hardware functionality in software such as memory built-in self-test and internal register self-configuration. Another possibility would be to store a boot-loader that is used to load and run the actual application boot-loader.
This will probably become a feature in the EDK63 version of the AEMB.
0 Comments