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ASH1 Assembler

During the last week, I worked on developing an assembler for ASH1! I have always wondered about the assemblers & compilers design… with AESTE, I had the chance…

ASH1 : An LCD Driver and VGA Colour Controller

After integrating Ethernet operations into ASH1.. I though of demonstrating ASH1 as an IOP .. so I looked for a simple I/O operation, yet a simple one to…

CRC Operations: A follow-up

Cyclic Redundancy Checksums generation and checking were among the challenging things in implementing ASH1. Looking for the accurate way to calculate/check CRCs took me a lot of time…

Ethernet Operations: Random Generator

Back-off is an important feature of the Ethernet MAC protocol. After a collision is detected through the MII/RMII interface, ASH1 should stop transmitting (there are more specific details…

Ethernet Operations : an eye-opener!

I have mentioned many times that ASH1 should be as small and as fast as possible… The current version of ASH1 is able to perform USB functions pretty…

Ethernet Operations: An Introduction

As ASH1 is an IOP, it should be able to perform Ethernet operations. In the past days, I have been going through Ethernet references and literature, I must…

ASH1: Input and Output Ports

ASH1 has 2 output ports and 1 input port whose specifications are like the following: Input Port 0 (iport0) An 8-bit input port with 4 schemes of encoding…

ASH1 : Life Cycle

ASH1 is growing and the design is being modified continuously to allow for further flexibility and capability in performing I/O operations. However, these modifications won’t be drastic. ASH1…

ASH1: Communication Protocol

  ASH1 communicates externally with two kinds of components, a master controller (master CPU) and a typical PHY interface unit that couples ASH1 with peripherals. The communication is…

ASH1: An Overview

As I have mentioned in the previous post, this and the coming posts would describe ASH1 architecture and special features. Below is the block diagram of ASH1.  …

ASH1: CRC Operation

One of ASH1 features is that it can perform – what we can call – software-controlled CRC calculation. As we know CRC incorporates bit shifting, xoring and in…

ASH1: Another Milestone

It’s always nice to have a meeting at AESTE. It charges you up and gives you the necessary motivation. If you want to get motivated … AESTE should…

ASH1: A glance at speed and size

Hi again ! As the goal for ash1 is to make it as small and as fast as possible. I’ve tried to investigate the size and speed features…

ASH1: FPGA proven!

It has been a while since my last blog … I was busy with my exams and university issues  for about a month. So, here we come again…

ASH1: Architecture

After summarizing USB Operations, time to kick off the ball for the match of ASH vs. IOP The general view of ASH1 processor is as the following: ASH1…