On the first day, another intern and I met Dr. Shawn in the office. He directed us to setup some tools for the office usage and he also gave us a talk about the concept of gitflow. Just like every other intern, Dr. Shawn treated us a lunch at the mall nearby. We had a good talk during the lunch and he briefly told us about what we will be working on for the next few months separately.

For the first and second day, I focused on studying witty and trying out the example provided in the server. Also, since I am not familiar with C++, I spent some times to study the syntax even though I already did for the most part before I started the internship. I tried writing out a simple hello world web application without referring to the example’s source code.

Dr. Shawn came to the office on the third day. He showed us the big picture of the whole project. We got to see some really cool features and at the same time we have a better insight about how each of our tasks would be linked together and function as a powerful tool. I am really excited to be part of this project. I spent the next day studying the code that was already written by previous interns and Dr. Shawn. I need to know how does the front end integrate with back end and what should I do to optimize the design.

I got to meet Dr. Shawn again on the next day and this time I was assigned my very first task which was about the naming convention of modules in Verilog based on the user input. Let say in an instantiation, there are two buzzers named U1 and U2. I need to utilize a tool named ‘Verilog-Mode’ to change the name of U1 and U2’s submodules. Also, I will be learning Verilog-mode’s macro expansion capabilities which greatly reduce Verilog coding times because I need to know the trick behind it to accomplish my task.