This week I started with having both SPI master and SPI slave verified for its functionality. Besides checking for the results of waveform graph manually, I also made sure it passed the automated test bench. This applies for all four modes of SPI which differs from the aspect of clock polarity and clock phase. I was glad I finally could get it done as I had problems of simulating the output at first.

I proceeded to the UART but again, I had problems simulating the output. At first, there were errors in my codes but I fixed it and it did simulate eventually. However, there was a warning in displaying the output for varying number of bits, parity bit and stop bit. The design passed for all possibilities when simulated with the automated testbench but as for the waveform, I could only observe for one case of UART. I realize I was spending too much time checking on how to view all possibilities the waveforms, with my basic weak on command prompt in the terminal, I decided to verify the I2C first. At last I was done with I2C as well with only UART left.
By the end of the week, I tried to design a code of my own, a GPIO with Wishbone interface. I am still working on this, hopefully it will work alright when I finish.